In recent years, along with increases in screen size and improvements in resolution, the driving methods for liquid crystal displays (LCDs) are moving from simple matrix methods to active matrix methods; and the displays are becoming capable of displaying large amounts of information. LCDs with more than several hundreds of thousands pixels are possible with active matrix methods which place a switching transistor at each pixel. Transparent insulating substrates such as fused quartz and glass which allow the fabrication of transparent displays are used as substrates for all types of LCDs. Although ordinarily semiconductor layers such as amorphous silicon or polycrystalline silicon are used as the active layer in thin film transistors (TFTs), the use of polycrystalline silicon which has higher operating speeds is advantageous for the case of producing monolithic displays which include integrated driving circuits. When polycrystalline silicon is used as the active layer, fused quartz is used as the substrate; and a so-called "high temperature" process in which the maximum processing temperature exceeds 1000.degree. C. is used to fabricate the TFTs. On the other hand, for the case of an amorphous silicon active layer, a common glass substrate can be used. For increases in LCD display size while maintaining low costs, such use of low-cost common glass substrates is indispensable. Such amorphous silicon layers, however, have such problems as electrical characteristics far inferior to those of polysilicon layers and slow operating speed. Since the high temperature process polysilicon TFTs use quartz substrates, however, there are problems with increasing display size and decreasing costs. Consequently, there is a strong need for technology which can fabricate a thin film semiconductor device employing a semiconductor layer such as polycrystalline silicon as the active layer upon a common glass substrate. But, when using large substrates which are well-suited to mass production, there is a severe restriction in that the substrates must be kept below a maximum processing temperature of about 570.degree. C. in order to avoid deformation of the substrates. In other words, technology which can produce, under such restrictions, the active layer of thin film transistors capable of controlling a liquid crystal display and of thin film transistors which can operate driving circuits at high speed is desired. These devices are currently known as the present low temperature poly--Si TFTs.
Previous low temperature poly--Si TFTs are shown on p. 387 of the SID (Society for Information Display) '93 Digest (1993). According to this description, 50 nm of amorphous silicon (a--Si) is first deposited at 550.degree. C. by LPCVD using monosilane (SiH) as the source gas and then converted from a--Si to poly--Si by laser irradiation. After patterning of the poly--Si layer, a gate insulator layer of SiO.sub.2 is deposited by ECR-PECVD at a substrate temperature of 100.degree. C. Following formation of the tantalum (Ta) gate electrode on top of the gate insulator layer, self-aligned transistor source and drain regions are formed in the silicon layer by ion implantation of donor or acceptor impurities while using the gate electrode as a mask. This ion implantation, known as "ion doping", is accomplished by a non-mass separating ion implanter. Hydrogen-diluted phosphine (PH.sub.3), diborane (B.sub.2 H.sub.6) or similar gas is used as a source gas for ion doping. Activation of the impurities is carried out at 300.degree. C. Following deposition of an interlevel insulator layer, electrodes and interconnects such as indium tin oxide (ITO) and aluminum (Al) are deposited to complete the thin film semiconductor device.
As described below, however, there are several inherent problems with poly--Si TFTs fabricated by the existing technology in the low temperature process which act as impediments to the adoption of this technology into mass production.
1. The high processing temperature of 550.degree. C. prevents the use of low-priced glass leading to a steep rise in product prices. Additionally, the degree of warp of the glass substrates as a result of their own weight increases as substrate size increases, and increases in liquid crystal display (LCD) sizes are not possible. PA0 2. The appropriate irradiation conditions necessary to obtain uniform laser irradiation over the entire substrate are severe and fall within a narrow range. As a result, the crystallization of the film can vary from uniform to non-uniform from lot to lot and reliable production is not possible. PA0 3. During the ion doping or subsequent low temperature activation at 300-350.degree. C. of the source and drain regions which are self-aligned with respect to the gate electrode, the problem of unsuccessful activation occasionally occurs. In other words, the resistance of the source and drain regions is several gigaohms. Especially when producing TFTs with lightly doped drains (LDD), this problem is serious and is a cause of significant decreases in production yield. PA0 4. Although only SiO.sub.2 formed by ECR-PECVD yields suitable transistor properties-in low temperature process poly--Si TFTs, it is difficult to increase the size of the ECR source in the ECR-PECVD equipment thereby making ECR-PECVD unsuitable for large LCD panels. Furthermore, the throughput is extremely poor. Consequently, ECR-PECVD reactors are not suitable as mass production-compatible, practical gate oxide film deposition equipment applicable to the manufacture of large size displays. PA0 5. Use of means such as laser irradiation for melt crystallization of semiconductor films like silicon results in partial agglomeration which can lead to large variations in the electrical properties of the semiconductor layer, roughness of the semiconductor layer, and decreases in the gate-source or gate-drain electrical breakdown strength. PA0 6. When low cost, conventional glass substrates were used, the underlevel protection layer necessary to effectively prevent penetration of impurities from the glass into the semiconductor layer was not the underlevel protection layer of the semiconductor devices which showed the optimum electrical properties. In other words, making the underlevel protection layer thicker to prevent impurity penetration leads to the deterioration of the electrical properties of the semiconductor device from stress generated by the underlayer or generates cracks in the semiconductor device. PA0 7. When plasma enhanced chemical vapor deposition (PECVD) is used to produce the semiconductor films, elements such as fluorine (F) and carbon (C), constitutive elements of vapors used in cleaning the deposition chamber which may remain after cleaning, may be incorporated as impurities into the films. The result is that the amount of impurities incorporated into the substrates varies, and it is not possible to reliably produce excellent thin film semiconductor devices. PA0 8. As the deposition temperature for semiconductor films in low pressure chemical vapor deposition (LPVCD) decreases, compatibility between uniformity within a substrate and the deposition rate is difficult. In other words, because the deposition rate decreases when the deposition temperature is lowered, the increase in pressure necessary to compensate for this behavior results in significant worsening of the uniformity over a single substrate. This tendency becomes noticeably more pronounced as the substrate size becomes larger and is a major obstacle to the mass production of large LCDs. PA0 9. There are three types of non-uniformity of the electrical characteristics of thin film semiconductor devices. In addition to variations within a single substrate, there are also variations from substrate to substrate in a single lot as well as variations between different lots. In the thin film semiconductor devices and the fabrication procedures of the existing technology, it is not possible to control these three types of non-uniformity. In particular, there has been almost no thought given to the variation in properties seen from lot to lot. PA0 10. In the fabrication of semiconductor thin films by PECVD, the adhesion between the semiconductor layer and the protective underlayer is poor; and numerous crater-shaped holes are generated in the semiconductor layer which can lead to delamination of the film in the worst case.
The present invention aims to solve the problems noted above with the purpose of providing a means for reliably producing good thin film semiconductor devices through a realistically convenient method using a processing temperature which will allow the use of common large glass substrates.